Google has lead me to discover that Akya is the name of:

• A journalist on Asia Times Online (Chan Akya)
• A consulting company in Mexico
• A Turkish fish (the Leer Fish or Garrick, Lichia amia)
• A Turkish torpedo
• A hotel in Ankara
• A buddhist monk

So much for “a meaningless name”.  Still, it could be worse, at least we’re not called “Pinto” or “Nova”‡…

†Wikipedia’s guide to IPA for English can be found here.

‡Pinto and Nova were two great car name disasters.  ”Nova” implies that it won’t go if you’re Spanish, and if you don’t know what “Pinto” means in Brazil, then I’m not going to tell you.

We are, of course, strongly engaged with customers… Tier one… household name… I can say no more…

At the kind of stage Akya is at companies are frequently in this Catch-22: You can’t announce a customer until the customer will allow you to, (and silicon IP customers are notoriously tight-lipped about the projects they’re working on). At the same time, you need announcable customers for many people to take you seriously.

I’m sure we’ll be able to tell you who eventually… Sigh.

Still, if a company tells you it’s engaged with companies too large to allow them to actually be spoken of, you can take that as a pretty-good guarantee that they’re doing something right!

Watch this space.

You can read Brian’s article here.

I firmly believe that RTL has had it’s day, and the industry needs to move towards something better, or we’re never going to be able to design the chips of the future (or at least, by the time we design them, the future will have been and gone, along with the company we’re working for).

For some time now, the “last, best hope” of design has been high-level synthesis, but for most of its history it’s felt rather like fusion power†, but that is now really changing, with useable tools out there from major EDA vendors, and big companies starting to adopt HLS for real designs.

I was pleased to see this article in EETimes reporting on an evaluation of Cadence’s C to Silicon tool by TI. It makes interesting reading – so go read it, or don’t, it’s up to you.

† ”Fusion power is the energy source of the future, and always will be”.

The essential thing is “dynamically” – i.e. the function of the logic can be changed in (or near) real-time, while a device is operating.  This is what distinguishes DRL from plain-old “reconfigurable logic” which could be anything from an FPGA to a pile of 7400-series chips and a breadboard.

I think that there are three broad categories of devices which could be described as “DRL”:

1. FPGAs with support for dynamic partial reconfiguration.
2. “Sea of processor” chips with many small processor-like cores – also known as “massively-parallel arrays” or “massively-parallel fabrics”.
3. Everything else.

I’ll talk about these three categories in later posts.

Oh, and in case you’re wondering, Akya’s product (called “ART”) is in category 3.  If you can’t wait until I get round to category 3 to find out about ART, you could always look at Akya’s website at www.akya.co.uk.

That's me!

You might also see the odd post by Dyson Wilkes, Akya’s Director of Engineering.

That's him!